QuICS_04152015_9981.JPG
Event Details
Speaker Name
Shantanu Debnath
Speaker Institution
(JQI)
Start Date & Time
2016-02-05 12:00 pm
End Date & Time
2016-02-05 12:00 pm
QuICS Event Type
Event Details

Free lunch served at 11:45

One approach towards implementing quantum algorithms is breaking them down into basic logic gates and executing these in a modular fashion. This allows for arbitrary sequences of gates operating on large qubit registers. In our experiment we demonstrate such a scalable architecture, complete with arbitrary control over individual qubits. Our processor consists of five 171Yb+ atomic ions held in a Paul trap which provide robust “atomic clock” states as qubits and are connected by their common motional modes. Composite logic gates are comprised of elementary single- and two-qubit rotations. By programming gate sequences in a reconfigurable manner we implement multiple instances of the Deutsch-Jozsa and the Bernstein-Vazirani problem. We further implement a scalable quantum Fourier transform protocol and examine its performance with reference to phase estimation algorithms and period finding, a crucial ingredient in Shor’s factorization.

Location
PSC 2136
Misc
Groups
TEMP migration NID
12001709